The present invention relates to electronic circuits and, more specifically, to methods and circuitry for preventing undesirable output voltage fluctuations in integrated circuitry.
Integrated circuits incorporating multiple output devices often have undesirable output signal fluctuations which are caused by negative ground voltage variations. Such transient behavior may be caused by the simultaneous switching of many multiple output devices which in turn causes excess current to be injected into the internal ground of the integrated circuit. The internal ground nodes of such circuits are connected to an external ground node (fixed at zero volts) through a package pin which includes an inherent inductance. As excess current is injected into the internal and external ground nodes, both positive and negative internal ground voltage fluctuations are established as described by the inductor-voltage equation V=L di/dt.
If only one output is switched, the current discharged from the load will cause only small fluctuations in circuit ground voltage. However, as the number of output devices switched increases, the circuit ground voltage level moves significantly. Since the input pin is connected to an external reference that does not vary with circuit ground, a large voltage develops across the input circuitry as the circuit ground goes negative. If the input is in the low state (Vil=0.5 volts) the voltage across the input circuit (Vil -Vground) may be greater than the device threshold (Vth =2 Vbe), causing the input voltage to appear to be at a high level momentarily and causing an undesirable transition in output voltage.
In particular, the negative ground voltage fluctuations, often termed spikes or glitches, cause transistors in the integrated circuitry to prematurely turn on when the transistors` emitters are referenced to internal ground and their bases are referenced to the external voltage supply. When such transistors prematurely turn on, the output of the circuitry often begins to oscillate and creates undesirable output signal fluctuations. Such internal ground voltage fluctuations will become increasingly worse as circuit designers strive to obtain even faster switching of multiple output devices.
A need has thus arisen for compensation circuitry which can prevent or eliminate undesirable output signal fluctuations caused by internal ground voltage transitions. In particular, a need has arisen for controlling the effects caused by severe negative internal ground voltage fluctuations created by rapid switching of multiple output devices. Such compensation circuitry should be useful with both transistor and diode input devices, and should be controllable as to the level of compensation control.
One technique to remedy the above problem is the subject matter of co-pending application Ser. No. 07/149,767 assigned to Texas Instruments Incorporated.
A second technique is set forth in application Ser. No. 881,146, filed Jul. 2, 1986, assigned to the assignee of the present invention, wherein a circuit referenced through a capacitor to Vcc is used. This circuit may be particularly useful in designs such as those as shown in FIG. 2 wherein one buffer (10) including a driver having an emitter referenced to ground drives numerous gates (60) that are simultaneously switched during normal operation. The simultaneous switching causes movement in the internal ground level which in turn causes the undesirable switching of the driver and oscillations in the multiple gates. The above circuit is designed to compensate for the ground movement by controlling the state of the one driver transistor under low level input conditions. While this circuit provides the needed compensation for designs such as those described above, circuits such as those shown in FIG. 3 designed with multiple buffers 10) and multiple gates (60), may require added degree of control. An additional technique is set forth in the application of Susan A. Curtis, Ser. No. 942,554, filed Dec. 16, 1986, assigned to the assignee of the present invention, wherein there is added to the compensation circuit of the application discussed above a feedback transistor Q202 and a resistor R201. These elements provide for the inhibition of the compensation circuit in the event that an increase in voltage difference between the input to the circuit being protected and ground is a result of a high input signal rather than noise which lowers the ground level. This control is made possible by connecting the added transistor (Q202) to a node that is at a one VCE(on) level and out of phase with the input.
Accordingly, it would be desirable to design a transient compensation control circuit that operates directly from input voltage levels and that is not in the direct path of existing circuitry. In addition, it would be desirable that such a circuit not be controlled in any way by the transistor being influenced by the compensation circuitry.